OLS2000

 

To assemble and examine experiment is laborious. OLS Series will condition the students to visualize the function of experiment circuit. Electronic theory will be taught straightly out of book accordingly.

The main objective of this trainer is to teach the student of electronic circuits rather than focusing on the assembly of the components.

 

• The OLS-2000 overlay learning system allows the student to assemble even the most involved circuit thus leaving enough time for fruitful experimentation
• The OLS-2000 overlay learning system is compatible with K&H products of IDL-800 digital lab, DT-01 digital trainer, ETS-5000 advanced digital system and ETS-7000 digital-analog training system
• No add-ons are required. A standardized set of all necessary components is included. The thoroughly course software was designed by educators with over 20 years practical teaching experience. However, the experiments are especially stressed on the theory . The professional manual is referred to the most widely used theory books
• The schematic diagrams component list and procedure are clearly offered. Each experiment was tested prior to final editing
• Moreover, the continuous hands-on exposure ensures the transfer of practical technical skills in the minimum time

 

• Experiment Contents
• 1. FE-01 basic logic functions
• 2. FE-02 basic logic functions
• 3. FE-03 basic logic functions
• 4. FE-04 basic logic functions
• 5. FE-05 boolean algebra and simplification of logic equations
• 6. FE-06 boolean algebra and simplification of logic equations
• 7. FE-07 boolean algebra and simplification of logic equations
• 8. FE-08 boolean algebra and simplification of logic equations
• 9. FE-09 boolean algebra and simplification of logic equations
• 10. FE-10 boolean algebra and simplification of logic equations
• 11. FE-11 demorgan's theorem
• 12. FE-12 demorgan's theorem
• 13. FE-13 demorgan's theorem
• 14. FE-14 demorgan's theorem
• 15. FE-15 demorgan's theorem
• 16. FE-16 TTL NAND/NOR gates definitions and operation
• 17. FE-17 NAND/NOR gates definitions and operation
• 18. FE-18 the "exclusive-OR" and its applications
• 19. FE-19 the "exclusive-OR" and its applications
• 20. FE-20 the "exclusive-OR" and its applications
• 21. FE-21 the "exclusive-OR "and its applications
• 22. FE-22 the "exclusive-OR" and its applications
• 23. FE-23 the "exclusive-OR" and its applications
• 24. FE-24 the "exclusive-OR "and its applications
• 25. FE-25 full-adder and full-subtractor
• 26. FE-26 full-adder and full-subtractor
• 27. FE-27 full-adder and full-subtractor
• 28. FE-28 full-adder and full-subtractor
• 29. FE-29 full-adder and full-subtractor
• 30. FE-30 bistable or flip-flop(FF)
• 31. FE-31 bistable or flip-flop(FF)
• 32. FE-32 bistable or flip-flop(FF)
• 33. FE-33 binary counters and the binary number system
• 34. FE-34 binary counters and the binary number system
• 35. FE-35 divide-by-n counters and decade counters
• 36. FE-36 divide-by-n counters and decade counters
• 37. FE-37 divide-by-n counters and decade counters
• 38. FE-38 divide-by-n counters and decade counters
• 39. FE-39 divide-by-n counters and decade counters
• 40. FE-40 shift registers and ring counters
• 41. FE-41 shift registers and ring counters
• 42. FE-42 shift registers and ring counters
• 43. FE-43 shift registers and ring counters
• 44. FE-44 pulse forming and shaping; the schmitt trigger
• 45. FE-45 pulse forming and shaping; the schmitt trigger
• 46. FE-46 integrated-circuit timers-the 74122, 74121, and 555
• 47. FE-47 integrated-circuit timers-the 74122, 74121, and 555
• 48. FE-48 decoding and encoding
• 49. FE-49 decoding and encoding
• 50. FE-50 decoding and encoding
• 51. FE-51 decoding and encoding
• 52. FE-52 random-access memories (RAM) scratch pad memories
• 53. FE-53 random-access memories (RAM) scratch pad memories
• 54. FE-54 the operational amplifier
• 55. FE-55 the operational amplifier
• 56. FE-56 the operational amplifier
• 57. FE-57 digital-to-analog(D/A)and analog-to-digital(A/D)conversion
• 58. FE-58 digital-to-analog(D/A)and analog-to-digital(A/D)conversion
• 59. FE-59 complementary symmetry MOS (CMOS)-principles and characteristics
• 60. FE-60 complementary symmetry MOS (CMOS)-principles and characteristics
• 61. FE-61 complementary symmetry MOS (CMOS)-TTL interface
• 62. FE-62 complementary symmetry MOS (CMOS)-TTL interface

• Standard Package
• 1. Circuit diagram (tracing paper) : 62pcs
• 2. Experiment book : 1pc
• 3. Components : 1set
• 4. RM-203 breadboard : 1pc
• 5. Dimensions : 290 x 225 x 55 mm (L x W x H)
• 6. Weight : 1.4kg